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YoctoZant
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VLSI Design Services

Analog and Mixed Signal Development

 Development of high-performance AMS IP blocks such as:

  • Power Management IPs
  • Power Supply Monitors 
  • Phase-Locked Loops (PLLs) 
  • ADC / DAC converters 
  • Amplifiers 
  • Oscillators

Foundation IP Development

  Design, layout, and characterization of:

  • Memory compilers 
  • IOs and ESD in compliance with JEDEC Standards
  • Standard cell (Logic) libraries

AMS & DMS Verification

   Comprehensive AMS-DV/DMS-DV solutions for both IP and full-chip designs, including:

  • SV based Real (WReal) Number modelling for AMS IPs
  • Methodology Development for AMS-DV/DMS-DV at Sub-System and Chip-Top Level

Digital Verification

   Comprehensive verification solutions for both IP and full-chip designs, including:

  • SystemVerilog-based verification 
  • UVM methodology 

CAD

  •   CAD PDK Development
    QA validation, release management, and long-term support. 
  • CAD Design Verification (DV) Methodology Development
    Automation frameworks, QA processes, and release support. 
  • CAD Physical Design (PD) / Design for Test (DFT) Methodology Development
    Automation infrastructure with verification and release support. 
  • CAD Silicon Package and Board Methodology Development
    Automation tools and frameworks with QA validation and production support. 

Physical Design

 End-to-end RTL-to-GDSII implementation including:

  • Floorplanning 
  • Placement and Routing (PnR) 
  • Clock Tree Synthesis (CTS) 
  • Physical Verification (PV) 
  • Design for Testability (DFT)

The team has handled designs with gate counts exceeding 2.8 million, targeting advanced 7nm process nodes.

Team Expertise

Semiconductor Design Expertise

Yoctozant’s engineering team possesses extensive experience in delivering high-performance analog and mixed-signal IP solutions across advanced semiconductor technologies. With a proven track record in developing robust AMS IPs, the team consistently demonstrates strong execution capability under tight schedules and resource-constrained environments. Their expertise also includes building and managing high-performance engineering teams, ensuring quality and efficiency across projects. Additionally, the team has hands-on experience working with advanced process nodes such as 14nm FinFET and 22nm FDSOI, enabling them to deliver cutting-edge semiconductor solutions.

Custom IC Design Expertise

The team at Yoctozant has deep technical expertise in custom integrated circuit design, covering the complete spectrum from circuit design and verification to layout implementation up to 14nm FinFET technologies. Their experience includes the development of foundation IPs such as memory, I/O interfaces, and standard cells, along with power management ICs and image sensor products. The team is also proficient in RF performance analysis and mixed-signal verification methodologies. Furthermore, they specialize in high-speed interface design, including 10 GHz SERDES, ADC/DAC architectures, and relaxation oscillators, along with full-chip and block-level AMS verification to ensure reliable and high-performance designs.

Design Verification Expertise

Yoctozant engineers specialize in advanced SoC and IP verification using industry-standard methodologies such as SystemVerilog and UVM. Their verification experience spans a wide range of complex systems, including SERDES PHY, Ethernet XGMII verification IP, solar power SoCs, and automotive SoCs such as power steering systems. The team is also experienced in PCIe Gen3/Gen4 verification, wireless communication SoCs, and 40G Ethernet MAC designs. In addition, they possess strong expertise in key industry protocols such as AMBA (APB, AHB, AXI), NAND flash controllers, solid-state storage controllers, video processing subsystems, and communication interfaces including I2C, I3C, and SPI. 

Physical Design Expertise

The physical design team at Yoctozant provides comprehensive full-chip implementation services across advanced semiconductor technology nodes. Their capabilities include physical design implementation up to 7nm nodes, chip finishing for processor, RF, and networking applications, and the implementation of advanced 5G mmWave chipsets. The team also develops automation and scripting solutions to optimize clock power, improve timing closure, and enhance overall design efficiency. Additionally, they have experience in implementing complex subsystems such as camera and modem subsystems, ensuring high-quality and performance-driven design outcomes. 


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